ELEC3404: Electronic Circuit Design (2013 - Semester 1)
| Unit: | ELEC3404: Electronic Circuit Design (6 CP) |
| Mode: | Normal-Day |
| On Offer: | Yes |
| Level: | Senior |
| Faculty/School: | School of Electrical and Information Engineering |
| Unit Coordinator/s: |
Dr McEwan, Alistair
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| Session options: | Semester 1 |
| Versions for this Unit: | |
| Site(s) for this Unit: |
| Campus: | Camperdown/Darlington |
| Pre-Requisites: | None. |
| Brief Handbook Description: | This unit of study aims to teach students analysis and design techniques for electronic systems such as signal amplifiers, differential amplifiers and power amplifiers. Completion of this unit will allow progression to advanced studies or to work in electronics and telecommunication engineering. Topics covered are as follows. The BJT and MOSFET as an amplifier. Biasing in amplifier circuits. Small signal operation and models. Single stage amplifiers. Internal capacitances and high frequency models. The frequency response of the common-emitter amplifier. Current sources and current mirrors. Differential amplifiers. Output stages and power amplifiers:class A, class B and class AB. |
| Assumed Knowledge: | A background in basic electronics and circuit theory is assumed. |
| Lecturer/s: |
Dr McEwan, Alistair
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| Timetable: | ELEC3404 Timetable | |||||||||||||||||||||||||
| Time Commitment: |
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| T&L Activities: | Tutorial: Informal small tutorial groups where students work on circuit problems. Students learn and practice how to analyze circuits and devices. Laboratory: Laboratory sessions where students learn about electronics. Practical instruction of electronics is vital to understanding circuits and developing problem solving skills. Independent Study: Several assignments based on circuit design and simulation to be completed outside laboratory and tutorial time. |
Attributes listed here represent the key course goals (see Course Map tab) designated for this unit. The list below describes how these attributes are developed through practice in the unit. See Learning Outcomes and Assessment tabs for details of how these attributes are assessed.
| Attribute Development Method | Attribute Developed |
| Extensive design and analysis work is done in tutorials and laboratory. | Design (Level 2) |
| Understand the benefits and trade-offs of different electronic circuits and components including the effects on general purpose circuit building blocks. | Engineering/IT Specialisation (Level 3) |
| Understanding of electronic components and their use in electronic circuits. | Maths/Science Methods and Tools (Level 2) |
| In addition to the understanding the text and lecture notes, students need to do additional information searches to obtain necessary supplementary material. | Information Seeking (Level 2) |
| Write up experimental laboratory reports and communicate outcomes to other class members. Participate in tutorial sessions. | Communication (Level 3) |
| Group work in labs and tutorial. | Project Management and Teamwork (Level 2) |
For explanation of attributes and levels see Engineering & IT Graduate Outcomes Table.
Learning outcomes are the key abilities and knowledge that will be assessed in this unit. They are listed according to the course goal supported by each. See Assessment Tab for details how each outcome is assessed.
Design (Level 2)| Assessment Methods: |
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| Assessment Description: |
Lab Skills: Lab work is performed in groups. Each student must use a bound notebook to record pre-lab work and lab experiments individually. These are assessed by lab staff in each tutorial session along with group participation and pre-lab work (done before the lab). The final project includes assessment for 1) your individual lab book recordings of design, calculations and simulations, circuit building, troubleshooting of the circuits, comments, solutions, and conclusions and 2) A group presentation. Final Exam and mid term quizzes: All subject matter in the course is examinable in this exam including laboratory, tutorial and assignment work. Tutorial: Calculation and design exercises. Assignment: Calculation design and presentation |
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| Assessment Feedback: | Feedback on assessment tasks will be provided within 1 week of the due date, apart from the final exam. General feedback will also be given in lectures and individual feedback in tutorials and laboratories. | ||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Grading: |
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| Faculty Policies & Procedures: | Academic Honesty in Coursework. All students must submit a cover sheet for all assessment work that declares that the work is original and not plagiarised from the work of others. Coursework assessment and examination policy. The faculty policy is to use standards based assessment for units where grades are returned and criteria based assessment for Pass/Fail only units. Norm referenced assessment will only be used in exceptional circumstances and its use will need to be justified to the Undergraduate Studies Committee. Special consideration for illness or misadventure may be considered when an assessment component is severely affected. This policy gives the details of the information that is required to be submitted along with the appropriate procedures and forms. Special Arrangements for Examination and Assessment. In exceptional circumstances alternate arrangements for exams or assessment can be made. However concessions for outside work arrangements, holidays and travel, sporting and entertainment events will not normally be given. Student Appeals against Academic Decisions. Students have the right to appeal any academic decision made by a school or the faculty. The appeal must follow the appropriate procedure so that a fair hearing is obtained. Note that policies regarding assessment submission, penalties and assessment feedback depend upon the individual unit of study. Details of these policies, where applicable, will be found above with other assessment details in this unit outline. All university policies can be found at http://sydney.edu.au/policy Various request forms for the Faculty of Engineering and IT can be found at http://sydney.edu.au/engineering/forms/ |
| Prescribed Text/s: |
Note: Students are expected to have a personal copy of all books listed.
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| Online Course Content: | My Uni |
| Note on Resources: |
Analog Electronic Design, Jonathan Scott, Prentice Hall The Art of Electronics, Thomas C. Hayes and Paul Horowitz, Cambridge University Press |
Note that the "Weeks" referred to in this Schedule are those of the official university semester calendar https://web.timetable.usyd.edu.au/calendar.jsp
| Week | Description |
| Week 1 | OpAmpRevision and MOSFETs |
| Week 2 | MOSFETS and BJTs |
| Assessment Due: Exp 1- Laboratory Introduction (Op-amp) | |
| Week 3 | BJT and MOSFET circuits |
| Week 4 | Integrated Circuits |
| Assessment Due: Exp 2 - BJT Amplifier | |
| Week 5 | Differential Circuits |
| Week 6 | Frequency response |
| Assessment Due: Exp 3 - MOSFET Differential Amplifier | |
| Week 7 | Feedback |
| Assessment Due: Assignment 1 | |
| Week 8 | Output Stages and Power Amplifiers |
| Week 9 | Operational Amplifier Circuits |
| Week 10 | CMOS Digital Amplifier Circuits |
| Week 11 | Filters and Tuned Amplifiers |
| Week 12 | Signal Generators and Waveform Shaping Circuits |
| Assessment Due: Project – Power Amplifier | |
| Week 13 | Review |
| Exam Period | Assessment Due: Final Exam - must be passed to pass the course |
Course Relations
The following is a list of courses which have added this Unit to their structure.
Course Goals
This unit contributes to the achievement of the following course goals:
| Attribute | Practiced | Assessed |
| Design (Level 2) | Yes | 20.5% |
| Engineering/IT Specialisation (Level 3) | Yes | 44.5% |
| Maths/Science Methods and Tools (Level 2) | Yes | 9% |
| Information Seeking (Level 2) | Yes | 3.5% |
| Communication (Level 3) | Yes | 13% |
| Professional Conduct (Level 2) | No | 0% |
| Project Management and Teamwork (Level 2) | Yes | 9.5% |
These goals are selected from Engineering & IT Graduate Outcomes Table which defines overall goals for courses where this unit is primarily offered. See Engineering & IT Graduate Outcomes Table for details of the attributes and levels to be developed in the course as a whole. Percentage figures alongside each course goal provide a rough indication of their relative weighting in assessment for this unit. Note that not all goals are necessarily part of assessment. Some may be more about practice activity. See Learning outcomes for details of what is assessed in relation to each goal and Assessment for details of how the outcome is assessed. See Attributes for details of practice provided for each goal.