ELEC2104: Electronic Devices and Circuits (2013 - Semester 2)

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Unit: ELEC2104: Electronic Devices and Circuits (6 CP)
Mode: Normal-Day
On Offer: Yes
Level: Intermediate
Faculty/School: School of Electrical and Information Engineering
Unit Coordinator/s: Dr Jin, Craig
Session options: Semester 2
Versions for this Unit:
Site(s) for this Unit: http://www.eelab.usyd.edu.au/ELEC2104/index.htm
Campus: Camperdown/Darlington
Pre-Requisites: None.
Brief Handbook Description: Modern Electronics has come to be known as microelectronics which refers to the Integrated Circuits (ICs) containing millions of discrete devices. This course introduces some of the basic electronic devices like diodes and different types of transistors. It also aims to introduce students the analysis and design techniques of circuits involving these discrete devices as well as the integrated circuits.

Completion of this course is essential to specialize in Electrical, Telecommunication or Computer Engineering stream. The knowledge of ELEC1103 is assumed.
Assumed Knowledge: ELEC1103. Ohm`s Law and Kirchoff`s Laws; action of Current and Voltage sources; network analysis and the superposition theorem; Thevenin and Norton equivalent circuits; inductors and capacitors, transient response of RL, RC and RLC circuits; the ability to use power supplies, oscilloscopes, function generators, meters, etc.
Lecturer/s: Dr Jin, Craig
Timetable: ELEC2104 Timetable
Time Commitment:
# Activity Name Hours per Week Sessions per Week Weeks per Semester
1 Lecture 2.00 2 13
2 Tutorial 2.00 1 12
3 Laboratory 3.00 1 8
4 Independent Study 2.00 1 13
T&L Activities: Tutorial: Tutorial assistance provided

Laboratory: Laboratory experiments

Laboratory: Prelab work

Independent Study: Self- study

Attributes listed here represent the key course goals (see Course Map tab) designated for this unit. The list below describes how these attributes are developed through practice in the unit. See Learning Outcomes and Assessment tabs for details of how these attributes are assessed.

Attribute Development Method Attribute Developed
Design problems with given specification as well as with assumed parameters. Design (Level 2)
Basic electronics concepts and principles, grounded in circuit theory. Engineering/IT Specialisation (Level 3)
Ability to apply circuit theory to modelling of electronic circuits and systems. Maths/Science Methods and Tools (Level 2)
Lab procedure and conducting experiments under controlled conditions Information Seeking (Level 2)
Ability to explain technical concepts Communication (Level 2)
Group work in labs Project Management and Teamwork (Level 2)

For explanation of attributes and levels see Engineering & IT Graduate Outcomes Table.

Learning outcomes are the key abilities and knowledge that will be assessed in this unit. They are listed according to the course goal supported by each. See Assessment Tab for details how each outcome is assessed.

Design (Level 2)
1. Ability to design power supplies and DC regulator circuit using zener diode.
Engineering/IT Specialisation (Level 3)
2. Ability to analyse and design circuits with operational amplifiers (OP-AMPs).
3. Ability to analyse simple diode circuits under DC and AC excitation.
4. Ability to analyse and design simple amplifier circuits using MOSFET.
5. Ability to analyse simple differential amplifier circuits using BJT.
6. Ability to use lab equipment to conduct experiments involving electronic devices and circuits.
Maths/Science Methods and Tools (Level 2)
7. Ability to analyse and design simple amplifier circuits using BJT in CE,CC and CB configurations.
Information Seeking (Level 2)
8. Able to use information literacy tools in the design of electronic systems for the project work.
Communication (Level 2)
9. Ability to communicate with group partner to design, fabricate and test the given project work employing diode and amplifier circuits.
Project Management and Teamwork (Level 2)
10. Capacity to work and sustain a team environment with the purpose of pooling knowledge, ideas and efforts towards laboratory projects specific to electronic devices and circuits.
Assessment Methods:
# Name Group Weight Due Week Outcomes
1 Lab Skills Yes 15.00 Multiple Weeks 1, 3, 4, 5, 6, 7, 8, 9, 10,
2 Mid-Sem Exam No 10.00 Week 9 1, 2, 3, 4, 5, 7,
3 Project Yes 15.00 Week 12 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
4 Final Exam No 60.00 Exam Period 1, 2, 3, 4, 5, 7,
Assessment Description: Lab Skills: Four lab exercises.

Project: Project

Mid-Sem Exam: Exam conducted in lecture time

Final Exam: Final exam
Grading:
Grade Type Description
Standards Based Assessment Final grades in this unit are awarded at levels of HD (High Distinction), D (Distinction), CR (Credit), P (Pass) and F (Fail) as defined by Academic Board Resolutions: Assessment and Examination of Coursework. Details of Academic Board Resolutions are available on the University`s Policy website at http://www.usyd.edu.au/ab/policies/Assess_Exam_Coursework.pdf Standards for grades in individual assessment tasks and the summative method for obtaining a final mark in the unit will be set out in a marking guide supplied by the unit coordinator.
Faculty Policies & Procedures: Academic Honesty in Coursework. All students must submit a cover sheet for all assessment work that declares that the work is original and not plagiarised from the work of others.

Coursework assessment and examination policy. The faculty policy is to use standards based assessment for units where grades are returned and criteria based assessment for Pass/Fail only units. Norm referenced assessment will only be used in exceptional circumstances and its use will need to be justified to the Undergraduate Studies Committee. Special consideration for illness or misadventure may be considered when an assessment component is severely affected. This policy gives the details of the information that is required to be submitted along with the appropriate procedures and forms.

Special Arrangements for Examination and Assessment. In exceptional circumstances alternate arrangements for exams or assessment can be made. However concessions for outside work arrangements, holidays and travel, sporting and entertainment events will not normally be given.

Student Appeals against Academic Decisions. Students have the right to appeal any academic decision made by a school or the faculty. The appeal must follow the appropriate procedure so that a fair hearing is obtained.

Note that policies regarding assessment submission, penalties and assessment feedback depend upon the individual unit of study. Details of these policies, where applicable, will be found above with other assessment details in this unit outline.

All university policies can be found at http://sydney.edu.au/policy

Various request forms for the Faculty of Engineering and IT can be found at http://sydney.edu.au/engineering/forms/
Prescribed Text/s: Note: Students are expected to have a personal copy of all books listed.
  • Microelectronic Circuits
Recommended Reference/s: Note: References are provided for guidance purposes only. Students are advised to consult these books in the university library. Purchase is not required.
  • Electronic Devices and Circuit
  • Electronic Devices: Systems & Applications
  • Electronics
Online Course Content: http://www.eelab.usyd.edu.au/ELEC2104/index.htm

Note that the "Weeks" referred to in this Schedule are those of the official university semester calendar https://web.timetable.usyd.edu.au/calendar.jsp

Week Description
Week 1 Amplification:Voltage ,Current and Power gains;
Ideal Op-Amp
The Op-Amp terminals:
Classification of Amplifiers
Circuit models;Frequency response:Amplifier bandwidth,
Nonlinear characteristics and Biasing;Symbol Convention;
Amplifier Power Supplies;
Week 2 Inverting configuration, Non-inverting configuration, Examples of Op-Amp circuits, Bistble multivibrator
Week 3 Analysis of diode circuits.
The ideal diode, Terminal characteristics of junction diode,
Week 4 The small signal model and its operation, Zener diode regulator, Rectifier circuits.
Week 5 Physical structure and mode of operation, Operation of npn transistor in the active mode, Circuit symbol and conventions, Transistor characteristics, Transistor circuits at DC.
Week 6 Transistor as an amplifier,
BJT - Continued:
Small signal equivalent models,
Graphical analysis, BJT Circuit design.
Week 7 BJT amplifier configurations, Transistor as a switch, Transistor current source.
BJT - Continued:
Week 8 Structure and operation of MOSFET, i-v characteristic of enhancement MOSFET, The depletion type MOSFET.
FET:
Week 9 FET continued:
MOSFET circuits at DC, MOSFET as an amplifier.
Assessment Due: Mid-Sem Exam
Week 10 Structure and operation of JFET
FET Continued:
Week 11 Differential Amplifier:
Small signal operation of BJT differential amplifier.
The BJT differential pair,
Week 12 Small signal operation of BJT differential amplifier
Assessment Due: Project
Week 13 (Self Study) Examples, Problems
Exam Period Assessment Due: Final Exam

Course Relations

The following is a list of courses which have added this Unit to their structure.

Course Year(s) Offered
Biomedical Engineering/Law 2013
Biomedical Engineering/Arts 2013
Biomedical Engineering/Commerce 2013
Biomedical Engineering/Medical Science 2013
Biomedical Engineering/Project Management 2013
Biomedical Engineering/Science 2013
Biomedical - Chemical and Biomolecular Major 2013
Biomedical - Electrical Major 2013
Biomedical - Information Technology Major 2013
Biomedical - Mechanical Major 2013
Biomedical - Mechatronics Major 2013
Computer Engineering 2010
Computer Engineering/Commerce 2010
Electrical 2010, 2011, 2012, 2013
Electrical Engineering/Arts 2011, 2012, 2013
Electrical Engineering/Commerce 2010, 2011, 2012, 2013
Electrical (Bioelectronics) 2011, 2012
Electrical (Bioelectronics) Engineering/Arts 2011, 2012
Electrical (Bioelectronics) Engineering/Commerce 2011, 2012
Electrical (Bioelectronics) Engineering/Medical Science 2011, 2012
Electrical (Bioelectronics) Engineering/Science 2011, 2012
Electrical (Bioelectronics) Engineering/Law 2011, 2012
Electrical Engineering/Medical Science 2011, 2012, 2013
Electrical Engineering/Project Management 2012, 2013
Electrical Engineering/Science 2011, 2012, 2013
Electrical (Computer) 2011, 2012, 2013
Electrical (Computer) Engineering/Arts 2011, 2012, 2013
Electrical (Computer) Engineering/Commerce 2011, 2012, 2013
Electrical (Computer) Engineering/Medical Science 2011, 2013
Electrical (Computer) Engineering/Science 2011, 2012, 2013
Electrical (Computer) Engineering/Law 2011, 2012, 2013
Electrical (Power) 2010, 2011, 2012, 2013
Electrical (Power) Engineering/Arts 2011, 2012, 2013
Electrical (Power) Engineering/Commerce 2010, 2011, 2012, 2013
Electrical (Power) Engineering/Medical Science 2011, 2012, 2013
Electrical (Power) Engineering/Science 2011, 2012, 2013
Electrical (Power) Engineering/Law 2010, 2011, 2012, 2013
Electrical (Telecommunications) 2011, 2012, 2013
Electrical (Telecommunications) Engineering/Arts 2011, 2012, 2013
Electrical (Telecommunications) Engineering/Commerce 2011, 2012, 2013
Electrical (Telecommunications)/Medical Science 2011, 2012, 2013
Electrical (Telecommunications) Engineering/Science 2011, 2012, 2013
Electrical (Telecommunications) Engineering/Law 2011, 2012, 2013
Mechatronic 2010, 2011, 2012, 2013, 2014
Mechatronic Engineering/Arts 2011, 2012, 2013
Mechatronic Engineering/Commerce 2010, 2011, 2012, 2013
Mechatronic Engineering/Medical Science 2011, 2012, 2013
Mechatronic Engineering/Project Management 2012, 2013
Mechatronic Engineering/Science 2011, 2012, 2013
Mechatronic (Space) 2010, 2011, 2012, 2013
Mechatronic (Space) Engineering/Arts 2011, 2012, 2013
Mechatronic (Space) Engineering/Commerce 2010, 2011, 2012, 2013
Mechatronic (Space) Engineering/Medical Science 2011, 2012, 2013
Mechatronic (Space) Engineering/Project Management 2012, 2013
Mechatronic (Space) Engineering/Science 2011, 2012, 2013
Electrical (Power) Engineering/Project Management 2012, 2013
Software 2010, 2011, 2012, 2013
Telecommunications 2010
Software Engineering/Arts 2011, 2012, 2013
Software Engineering/Commerce 2010, 2011, 2012, 2013
Software Engineering/Medical Science 2011, 2012, 2013
Software Engineering/Project Management 2012, 2013
Software Engineering/Science 2011, 2012, 2013
Bachelor of Information Technology (Computer Science) 2010, 2011, 2012
Information Technology(Computer Science)/Bachelor of Arts 2012
Information Technology(Computer Science)/Bachelor of Science 2012
Information Technology(Information Systems)/Bachelor of Arts 2012
Information Technology(Information Systems)/Bachelor of Science 2012, 2013

Course Goals

This unit contributes to the achievement of the following course goals:

Attribute Practiced Assessed
Design (Level 2) Yes 14.84%
Engineering/IT Specialisation (Level 3) Yes 60.84%
Maths/Science Methods and Tools (Level 2) Yes 14.84%
Information Seeking (Level 2) Yes 3.17%
Communication (Level 2) Yes 3.17%
Professional Conduct (Level 2) No 0%
Project Management and Teamwork (Level 2) Yes 3.17%

These goals are selected from Engineering & IT Graduate Outcomes Table which defines overall goals for courses where this unit is primarily offered. See Engineering & IT Graduate Outcomes Table for details of the attributes and levels to be developed in the course as a whole. Percentage figures alongside each course goal provide a rough indication of their relative weighting in assessment for this unit. Note that not all goals are necessarily part of assessment. Some may be more about practice activity. See Learning outcomes for details of what is assessed in relation to each goal and Assessment for details of how the outcome is assessed. See Attributes for details of practice provided for each goal.